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Commit 9b702a70 authored by Ak1508's avatar Ak1508 Committed by Eric Pooser
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added shms dc maps and perl script (#426)

parent 85c00d10
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#!/usr/bin/perl -w
use Data::Dumper;
my %cables;
my %tdc;
my $refchan=127; # NOTE this assumption is a hack for the ESB setup (BDS)
## Return the first channel of a TDC connector (A0, A1, .. ,D1)
sub conn2ch($) {
my $conn = shift;
$conn =~ tr/ABCD/0123/;
if($conn =~ /([0-3])([01])/) {
return $1*32 + $2*16;
} else {
die "Invalid connector argument: $conn\n";
}
}
while(<>) {
next if(/^\s*$/);
next if(/^#/);
chomp;
my @f=split;
if($f[0] eq "tdc") {
my $slot=$f[1];
my $conn=$f[2];
my $cable=$f[3];
my @refs=();
@refs = split(/[, ]+/, $f[4]) if($#f == 4);
die("TDC dup:'$_'\n") if( exists($tdc{$slot}{$conn}) );
$tdc{$slot}{$conn}{"cable"} = $cable;
$tdc{$slot}{$conn}{"refs"} = \@refs;
$tdc{$slot}{"refs"} = [] if( !exists($tdc{$slot}{"refs"}) );
my @chans = map( conn2ch($conn) + $_, @refs );
push(@{$tdc{$slot}{"refs"}}, @chans);
next;
}
if($f[0] eq "cable") {
my $cable=$f[1];
my $w_start=$f[2];
my $w_end=$f[3];
my @NC=();
@NC = split(/[, ]+/, $f[4]) if($#f == 4);
die("Cable dup:'$_'\n") if( exists($cables{$cable}{"w_start"}) );
$cables{$cable}{"w_start"} = $w_start;
$cables{$cable}{"w_end"} = $w_end;
$cables{$cable}{"NC"} = \@NC;
die("Invalid pin count '$_'\n") if( 16 != abs($w_end - $w_start) + 1 + $#NC + 1);
next;
}
}
my %wiremap;
my @planes = qw( U U' X X' V V' );
sub numerically { $a <=> $b };
foreach my $sl ( sort numerically keys %tdc ) {
foreach my $conn (keys %{$tdc{$sl}}) {
next if($conn eq "refs");
my $conn2chn = conn2ch($conn);
my $cab = $tdc{$sl}{$conn}{"cable"};
next unless ( $cab =~ /(.)\d?c\d+(p)?/ );
my $p = $1;
$p .= "'" if(defined($2));
my $w_st = $cables{$cab}{"w_start"};
my $w_end = $cables{$cab}{"w_end"};
my @wires = $w_st < $w_end ?
$cables{$cab}{"w_start"} .. $cables{$cab}{"w_end"} :
reverse($cables{$cab}{"w_end"} .. $cables{$cab}{"w_start"});
for my $i (0 .. $#wires) {
$wiremap{$p}[$wires[$i]] = [ $sl, $conn2chn + $i ];
}
}
}
sub print_wiremap {
my %wiremap = %{$_[0]};
print "====== WIREMAP ======\n";
foreach my $p (sort keys %wiremap) {
print "------- Plane $p -------\n";
printf("%6s %6s %6s\n","wire","slot","chan");
my @wires = @{$wiremap{$p}};
foreach $i (0 .. $#wires) {
printf("%6d %6d %6d\n", $i, @{$wires[$i]});
}
}
print "\n";
}
sub print_replaymap {
my %wiremap = %{$_[0]};
print "====== WIREMAP ======\n";
my $lastslot = -1;
foreach my $p (sort keys %wiremap) {
my $pnum=1;
foreach $pname (@planes) {
last if($pname eq $p);
$pnum++;
}
my @wires = @{$wiremap{$p}};
foreach $i (0 .. $#wires) {
my $slot= ${$wires[$i]}[0];
my $chan= ${$wires[$i]}[1];
my $wirenum=$i+1;
if ($slot != $lastslot) {
print "SLOT=$slot,$refchan\n";
}
print "$chan,$pnum,$wirenum ! Plane $p, wire $wirenum\n";
$lastslot=$slot;
}
}
print "\n";
}
sub print_tdcs {
my %tdc = %{$_[0]};
print "====== TDCs ======\n";
foreach my $sl (sort numerically keys %tdc) {
print "TDC Slot $sl\n";
if( ${@{$tdc{$sl}{"refs"}}} > 1 ) {
print "\tRefs: " . join(", ", sort numerically @{$tdc{$sl}{"refs"}}) . "\n";
}
foreach my $conn (sort keys %{$tdc{$sl}}) {
next if($conn eq "refs");
printf("%4s : %6s", $conn, $tdc{$sl}{$conn}{cable});
if( ${@{$tdc{$sl}{"refs"}}} > 1 ) {
print "\t\tRef: " . join(", ", @{$tdc{$sl}{$conn}{"refs"}}) . "\n";
} else {
print "\n";
}
}
}
print "\n";
}
sub print_cables {
my %cables = %{$_[0]};
print "====== CABLES ======\n";
printf(" %-6s %9s %9s : %s\n", "Cable", "wire_st", "wire_end", "Not Connected");
foreach my $cab (sort keys %cables) {
printf(" %-6s %9d %9d : %s\n",
$cab, $cables{$cab}{"w_start"}, $cables{$cab}{"w_end"},
join(", ", @{$cables{$cab}{"NC"}}));
}
print "\n";
}
#print_tdcs(\%tdc);
#print_cables(\%cables);
print_replaymap(\%wiremap);
## X plane
## Wire 0 is top (from beam perspective)
# cable w_start w_end N/C
cable Xc3 15 0
cable Xc4 31 16
cable Xc5 47 32
cable Xc2 48 63
cable Xc1 64 78 15
## X' plane
## Wire 0 is top (from beam perspective)
# cable w_start w_end N/C
cable Xc2p 14 0 15
cable Xc1p 30 15
cable Xc3p 31 46
cable Xc4p 47 62
cable Xc5p 63 78
## U plane
## Wire 0 is upper right corner (from beam perspective)
# cable w_start w_end N/C
cable Uc4 14 0 15
cable Uc5 30 15
cable Uc6 46 31
cable Uc7 62 47
cable Uc3 63 78
cable Uc2 79 94
cable Uc1 95 106 12,13,14,15
## U' plane
## Wire 0 is upper right corner (from beam perspective)
# cable w_start w_end N/C
cable Uc5p 11 0 12,13,14,15
cable Uc6p 27 12
cable Uc7p 43 28
cable Uc4p 44 59
cable Uc3p 60 75
cable Uc2p 76 91
cable Uc1p 92 106 15
## V plane
## Wire 0 is upper left corner (from beam perspective)
# cable w_start w_end N/C
cable Vc4 14 0 15
cable Vc3 30 15
cable Vc2 46 31
cable Vc1 62 47
cable Vc5 63 78
cable Vc6 79 94
cable Vc7 95 106 12,13,14,15
## V' plane
## Wire 0 is upper left corner (from beam perspective)
# cable w_start w_end N/C
cable Vc3p 11 0 12,13,14,15
cable Vc2p 27 12
cable Vc1p 43 28
cable Vc4p 44 59
cable Vc5p 60 75
cable Vc6p 76 91
cable Vc7p 92 106 15
## TDC mapping
# slot conn cable ref
tdc 6 A0 Xc5p
tdc 6 A1 Uc7
tdc 6 B0 Uc7p
tdc 6 B1 Xc5
tdc 6 C0 Vc7p 15
tdc 6 C1 Uc6
tdc 6 D0 Xc4p
#tdc 6 D1 Uc6p
tdc 6 D1 NC 15
tdc 7 A0 Xc3p
tdc 7 A1 Uc5
tdc 7 B0 Vc5
tdc 7 B1 Xc4
tdc 7 C0 Vc7 15
tdc 7 C1 Vc6p
tdc 7 D0 Vc6
#tdc 7 D1 Vc5p
tdc 7 D1 NC 15
tdc 8 A0 Xc3
tdc 8 A1 Vc3
tdc 8 B0 Xc1p
tdc 8 B1 Uc2
tdc 8 C0 Uc5p 15
tdc 8 C1 Vc4p
tdc 8 D0 Uc3p
#tdc 8 D1 Uc3
tdc 8 D1 NC 15
tdc 9 A0 Uc4p
tdc 9 A1 Xc2p
tdc 9 B0 Vc4 15
tdc 9 B1 Vc1
tdc 9 C0 Uc4 15
tdc 9 C1 Xc1
tdc 9 D0 Vc1p
#tdc 9 D1 Uc1 15
tdc 9 D1 NC 15
tdc 10 A0 Vc2
tdc 10 A1 Uc1p 15
tdc 10 B0 Vc2p
tdc 10 B1 Xc2
tdc 10 C0 Vc3p 15
tdc 10 C1 Uc2p
tdc 10 D0 NC
tdc 10 D1 NC 15
## Added extra TDC and moved one cable from D1 from other TDCs here to provide
# a slot for a reference signal
# All TDCs now have a ref pulse in D1[15] == TDC channel 127
tdc 11 A0 Uc6p
tdc 11 A1 Vc5p
tdc 11 B0 Uc3
tdc 11 B1 Uc1
tdc 11 C0 NC
tdc 11 C1 NC
tdc 11 D0 NC
tdc 11 D1 NC 15
# vim: noexpandtab softtabstop=0 shiftwidth=8 tabstop=8
## X plane
## Wire 0 is top (from beam perspective)
# cable w_start w_end N/C
cable Xc3 15 0
cable Xc4 31 16
cable Xc5 47 32
cable Xc2 48 63
cable Xc1 64 78 15
## X' plane
## Wire 0 is top (from beam perspective)
# cable w_start w_end N/C
cable Xc2p 14 0 15
cable Xc1p 30 15
cable Xc3p 31 46
cable Xc4p 47 62
cable Xc5p 63 78
## U plane
## Wire 0 is upper right corner (from beam perspective)
# cable w_start w_end N/C
cable Uc4 14 0 15
cable Uc5 30 15
cable Uc6 46 31
cable Uc7 62 47
cable Uc3 63 78
cable Uc2 79 94
cable Uc1 95 106 12,13,14,15
## U' plane
## Wire 0 is upper right corner (from beam perspective)
# cable w_start w_end N/C
cable Uc5p 11 0 12,13,14,15
cable Uc6p 27 12
cable Uc7p 43 28
cable Uc4p 44 59
cable Uc3p 60 75
cable Uc2p 76 91
cable Uc1p 92 106 15
## V plane
## Wire 0 is upper left corner (from beam perspective)
# cable w_start w_end N/C
cable Vc4 14 0 15
cable Vc3 30 15
cable Vc2 46 31
cable Vc1 62 47
cable Vc5 63 78
cable Vc6 79 94
cable Vc7 95 106 12,13,14,15
## V' plane
## Wire 0 is upper left corner (from beam perspective)
# cable w_start w_end N/C
cable Vc3p 11 0 12,13,14,15
cable Vc2p 27 12
cable Vc1p 43 28
cable Vc4p 44 59
cable Vc5p 60 75
cable Vc6p 76 91
cable Vc7p 92 106 15
## TDC mapping
# slot conn cable ref
tdc 12 A0 Xc5p
tdc 12 A1 Uc7
tdc 12 B0 Uc7p
tdc 12 B1 Xc5
tdc 12 C0 Vc7p 15
tdc 12 C1 Uc6
tdc 12 D0 Xc4p
tdc 12 D1 Uc6p
tdc 13 A0 Xc3p
tdc 13 A1 Uc5
tdc 13 B0 Vc5
tdc 13 B1 Xc4
tdc 13 C0 Vc7 15
tdc 13 C1 Vc6p
tdc 13 D0 Vc6
tdc 13 D1 Vc5p
tdc 14 A0 Xc3
tdc 14 A1 Vc3
tdc 14 B0 Xc1p
tdc 14 B1 Uc2
tdc 14 C0 Uc5p 15
tdc 14 C1 Vc4p
tdc 14 D0 Uc3p
tdc 14 D1 Uc3
tdc 15 A0 Uc4p
tdc 15 A1 Xc2p
tdc 15 B0 Vc4 15
tdc 15 B1 Vc1
tdc 15 C0 Uc4 15
tdc 15 C1 Xc1
tdc 15 D0 Vc1p
tdc 15 D1 Uc1 15
tdc 16 A0 Vc2
tdc 16 A1 Uc1p 15
tdc 16 B0 Vc2p
tdc 16 B1 Xc2
tdc 16 C0 Vc3p 15
tdc 16 C1 Uc2p
tdc 16 D0 NC
tdc 16 D1 NC 15
# vim: noexpandtab softtabstop=0 shiftwidth=8 tabstop=8
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