From 4fa29ceb504087c25fd85c16abc150831af29b4e Mon Sep 17 00:00:00 2001
From: Kai Torben Ohlhus <k.ohlhus@gmail.com>
Date: Fri, 14 Feb 2020 10:59:34 +0900
Subject: [PATCH] openblas: add variant +consistentFPCSR (#14876)
Add the OpenBLAS variant `+consistentFPCSR`, by default `False`, which adds the compile definition `CONSISTENT_FPCSR=1` as documented in OpenBLAS `Makefile.rule`.
---
var/spack/repos/builtin/packages/openblas/package.py | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/var/spack/repos/builtin/packages/openblas/package.py b/var/spack/repos/builtin/packages/openblas/package.py
index b3ce744bf8..607a41e85d 100644
--- a/var/spack/repos/builtin/packages/openblas/package.py
+++ b/var/spack/repos/builtin/packages/openblas/package.py
@@ -37,6 +37,7 @@ class Openblas(MakefilePackage):
variant('ilp64', default=False, description='Force 64-bit Fortran native integers')
variant('pic', default=True, description='Build position independent code')
variant('shared', default=True, description='Build shared libraries')
+ variant('consistentFPCSR', default=False, description='Synchronize FP CSR between threads (x86/x86_64 only)')
variant(
'threads', default='none',
@@ -234,6 +235,11 @@ def make_defs(self):
if '+ilp64' in self.spec:
make_defs += ['INTERFACE64=1']
+ # Synchronize floating-point control and status register (FPCSR)
+ # between threads (x86/x86_64 only).
+ if '+consistentFPCSR' in self.spec:
+ make_defs += ['CONSISTENT_FPCSR=1']
+
# Prevent errors in `as` assembler from newer instructions
if self.spec.satisfies('%gcc@:4.8.4'):
make_defs.append('NO_AVX2=1')
--
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