From d0f9439c47037c903ca09b47bc6fae99e54e75d9 Mon Sep 17 00:00:00 2001 From: Whitney Armstrong <warmstrong@anl.gov> Date: Sat, 5 Jun 2021 23:06:30 -0500 Subject: [PATCH] modified: compact/central_tracker.xml --- compact/central_tracker.xml | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/compact/central_tracker.xml b/compact/central_tracker.xml index e1eb51e9..98e9656d 100644 --- a/compact/central_tracker.xml +++ b/compact/central_tracker.xml @@ -212,9 +212,9 @@ reflect="false"> <module name="Module1" vis="AnlProcess_Blue"> <trd x1="TrackerEndcapInnerMod1_x1/2.0" x2="TrackerEndcapInnerMod1_x2/2.0" z="TrackerEndcapInnerMod1_y/2"/> - <module_component thickness="3.0*mm" material="PEEK"/> + <module_component thickness="1.0*mm" material="PEEK"/> <module_component thickness="500.0*um" material="Silicon" sensitive="true"/> - <module_component thickness="3.0*mm" material="PEEK"/> + <module_component thickness="1.0*mm" material="PEEK"/> </module> <layer id="1"> <envelope vis="AnlRed" @@ -224,8 +224,8 @@ zstart="TrackerEndcapInner_zmin" /> <ring vis="AnlRed" r="TrackerEndcapInner_rmin1+TrackerEndcapInnerMod1_y/2.0" - zstart="TrackerEndcapInner_zmin + 1.0*cm" - nmodules="12" dz="10 * mm" module="Module1" /> + zstart="5.0*mm" + nmodules="12" dz="5 * mm" module="Module1" /> </layer> </detector> @@ -238,9 +238,9 @@ reflect="true"> <module name="Module1" vis="AnlProcess_Blue"> <trd x1="TrackerEndcapInnerMod1_x1/2.0" x2="TrackerEndcapInnerMod1_x2/2.0" z="TrackerEndcapInnerMod1_y/2"/> - <module_component thickness="3.0*mm" material="PEEK"/> + <module_component thickness="1.0*mm" material="PEEK"/> <module_component thickness="500.0*um" material="Silicon" sensitive="true"/> - <module_component thickness="3.0*mm" material="PEEK"/> + <module_component thickness="1.0*mm" material="PEEK"/> </module> <layer id="1"> <envelope vis="AnlRed" @@ -250,8 +250,8 @@ zstart="TrackerEndcapInner_zmin" /> <ring vis="AnlRed" r="TrackerEndcapInner_rmin1+TrackerEndcapInnerMod1_y/2.0" - zstart="TrackerEndcapInner_zmin + 1.0*cm" - nmodules="12" dz="10 * mm" module="Module1" /> + zstart="5.0*mm" + nmodules="12" dz="5 * mm" module="Module1" /> </layer> </detector> @@ -372,9 +372,9 @@ reflect="false"> <module name="Module1" vis="AnlProcess_Blue"> <trd x1="TrackerEndcapOuterMod1_x1/2.0" x2="TrackerEndcapOuterMod1_x2/2.0" z="TrackerEndcapOuterMod1_y/2"/> - <module_component thickness="3.0*mm" material="PEEK"/> + <module_component thickness="1.0*mm" material="PEEK"/> <module_component thickness="500.0*um" material="Silicon" sensitive="true"/> - <module_component thickness="3.0*mm" material="PEEK"/> + <module_component thickness="1.0*mm" material="PEEK"/> </module> <layer id="1"> <envelope vis="AnlRed" @@ -384,8 +384,8 @@ zstart="TrackerEndcapOuter_zmin" /> <ring vis="AnlRed" r="TrackerEndcapOuter_rmin1+TrackerEndcapOuterMod1_y/2.0" - zstart="TrackerEndcapOuter_zmin + 1.0*cm" - nmodules="12" dz="10 * mm" module="Module1" /> + zstart="5.0*mm" + nmodules="12" dz="5 * mm" module="Module1" /> </layer> </detector> @@ -398,9 +398,9 @@ reflect="true"> <module name="Module1" vis="AnlProcess_Blue"> <trd x1="TrackerEndcapOuterMod1_x1/2.0" x2="TrackerEndcapOuterMod1_x2/2.0" z="TrackerEndcapOuterMod1_y/2"/> - <module_component thickness="3.0*mm" material="PEEK"/> + <module_component thickness="1.0*mm" material="PEEK"/> <module_component thickness="500.0*um" material="Silicon" sensitive="true"/> - <module_component thickness="3.0*mm" material="PEEK"/> + <module_component thickness="1.0*mm" material="PEEK"/> </module> <layer id="1"> <envelope vis="AnlRed" @@ -410,8 +410,8 @@ zstart="TrackerEndcapOuter_zmin" /> <ring vis="AnlRed" r="TrackerEndcapOuter_rmin1+TrackerEndcapOuterMod1_y/2.0" - zstart="0.0*cm" - nmodules="12" dz="10 * mm" module="Module1" /> + zstart="5.0*mm" + nmodules="12" dz="5 * mm" module="Module1" /> </layer> </detector> <!-- -- GitLab