From 57a168b9a344405b672350ae2ec34fa1d90c95be Mon Sep 17 00:00:00 2001 From: Ziyue Zhang <Ziyue_Zhang@localhost.localdomain> Date: Fri, 5 Mar 2021 12:02:28 -0600 Subject: [PATCH] WIP: rec_ordered(rec) and sim_ordered(sim) debug --- benchmarks/dvmp/analysis/dvmp.h | 1 + 1 file changed, 1 insertion(+) diff --git a/benchmarks/dvmp/analysis/dvmp.h b/benchmarks/dvmp/analysis/dvmp.h index 140349de..94a4d810 100644 --- a/benchmarks/dvmp/analysis/dvmp.h +++ b/benchmarks/dvmp/analysis/dvmp.h @@ -106,6 +106,7 @@ namespace util { } } + if(first == -1) cout<<"jpsi not RCed"<<endl; if(first != -1){ momenta[5].SetPxPyPzE(parts[first].p.x, parts[first].p.y, parts[first].p.z, parts[first].energy); momenta[6].SetPxPyPzE(parts[second].p.x, parts[second].p.y, parts[second].p.z, parts[second].energy); -- GitLab