From 1482384c7d65b5e1f6392b91d6da51e02e264e65 Mon Sep 17 00:00:00 2001 From: Ziyue Zhang <Ziyue_Zhang@localhost.localdomain> Date: Fri, 5 Mar 2021 12:04:15 -0600 Subject: [PATCH] WIP: rec_ordered(rec) and sim_ordered(sim) debug --- benchmarks/dvmp/analysis/dvmp.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/benchmarks/dvmp/analysis/dvmp.h b/benchmarks/dvmp/analysis/dvmp.h index 94a4d810..ef1d5455 100644 --- a/benchmarks/dvmp/analysis/dvmp.h +++ b/benchmarks/dvmp/analysis/dvmp.h @@ -101,11 +101,11 @@ namespace util { first = i; second = j; best_mass = new_mass; - cout<<Form("first = %d, second = %d, jpsi new mass = %f", i, j, best_mass)<<endl; } } } + cout<<Form("first = %d, second = %d, jpsi new mass = %f", first, second, best_mass)<<endl; if(first == -1) cout<<"jpsi not RCed"<<endl; if(first != -1){ momenta[5].SetPxPyPzE(parts[first].p.x, parts[first].p.y, parts[first].p.z, parts[first].energy); -- GitLab